Your impact Drive the development of advanced ASIC emulation environments to accelerate pre-silicon validation and improve time-to-market for next-generation switching systems. Build and refine emulation infrastructure using C/C++ and TCL, enabling early identification of critical issues and enabling robust silicon. Collaborate closely with design, verification, power, and diagnostic teams to implement, test, and debug complex multi-terabit systems. Develop and execute sophisticated test plans and traffic scenarios to ensure flawless system performance post-silicon. Shape the reliability and scalability of the hardware that underpins cloud and enterprise networks worldwide.

Desired Candidate Profile

Minimum qualifications

Master s degree in Electrical Engineering, Electronics Engineering, or Computer Engineering with 4+ years of relevant experience, OR Bachelor s degree in the same fields with 5+ years of relevant experience

2+ years of emulation experience on platforms such as Palladium, Veloce, or Zebu as well as experience with compilation, debug, performance testing.

Proficiency in RTL development using Verilog or System Verilog for emulation prototypes

Proficiency in C/C++ and TCL for emulation infrastructure development

Experience with system debug tools (e.g., gdb, waveform debuggers)

Preferred qualifications

Experience with scripting languages (e.g., Python, Perl)

Strong written and verbal communication skills

Post-silicon functional validation or debugging experience

Knowledge of protocols such as PCIe, I2C, Ethernet packet headers, and Ethernet protocol

Collaborative mindset with a drive to learn and contribute in a team environment